Power-efficient trace caches

J. S. Hu, N. Vijaykrishnan, A. Kandemir, A. J. Irwin

Research output: Contribution to journalConference articlepeer-review

6 Scopus citations

Abstract

This paper exploits the drawbacks of wasting power when accessing the instruction cache that stores only static sequence of instructions. Although trace cache is first introduced to catch the dynamic characteristics of instructions in execution, conventional trace cache (CTC) does increase the power consumption in fetch unit. A Sequential Trace Cache (STC) has been investigated for its power efficiency in this paper.

Original languageEnglish (US)
Article number999209
Number of pages1
JournalProceedings -Design, Automation and Test in Europe, DATE
DOIs
StatePublished - Dec 1 2002
Event2002 Design, Automation and Test in Europe Conference and Exhibition, DATE 2002 - Paris, France
Duration: Mar 4 2002Mar 8 2002

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Fingerprint Dive into the research topics of 'Power-efficient trace caches'. Together they form a unique fingerprint.

Cite this