This paper exploits the drawbacks of wasting power when accessing the instruction cache that stores only static sequence of instructions. Although trace cache is first introduced to catch the dynamic characteristics of instructions in execution, conventional trace cache (CTC) does increase the power consumption in fetch unit. A Sequential Trace Cache (STC) has been investigated for its power efficiency in this paper.
|Original language||English (US)|
|Number of pages||1|
|Journal||Proceedings -Design, Automation and Test in Europe, DATE|
|State||Published - Dec 1 2002|
|Event||2002 Design, Automation and Test in Europe Conference and Exhibition, DATE 2002 - Paris, France|
Duration: Mar 4 2002 → Mar 8 2002
All Science Journal Classification (ASJC) codes