Programmable non-volatile memory design featuring reconfigurable in-memory operations

Nicholas Jao, Akshay Krishna Ramanathan, Abhronil Sengupta, John Sampson, Vijaykrishnan Narayanan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

With data volume growing exponentially in today's era, modern computing systems are increasingly bottlenecked and consistently burdened by the costs of data movement. Driven by the development of emerging non-volatile memory (NVM) technologies and by the increasing demand for high throughput in big data applications, considerable research effort has gone into embedding computing in memory and exploiting parallelism in data-intensive workloads to address the “memory wall” bottleneck. In this work, we propose a non-volatile memory design which leverages run-time reconfigurability of peripheral circuits to perform various in-memory computations like that of a field-programmable gate array (FPGA). Our architecture allows this intelligent storage system to operate as both a main memory and an accelerator for memory-intensive applications such as matrix multiplication, database query and artificial neural networks.

Original languageEnglish (US)
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103976
DOIs
StatePublished - Jan 1 2019
Event2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
Duration: May 26 2019May 29 2019

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May
ISSN (Print)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
CountryJapan
CitySapporo
Period5/26/195/29/19

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Programmable non-volatile memory design featuring reconfigurable in-memory operations'. Together they form a unique fingerprint.

  • Cite this

    Jao, N., Ramanathan, A. K., Sengupta, A., Sampson, J., & Narayanan, V. (2019). Programmable non-volatile memory design featuring reconfigurable in-memory operations. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings [8702534] (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2019.8702534