Rapid turn-around system for designing efficient fine grained signal processors.

Janet Ann Beekman, Robert Michael Owens, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A CAD (computer-aided design) tool set designed for rapid prototyping of a specific class of high-performance signal processing architectures is presented. Efficient implementation of these architectures results in systems that are very fast (<35-ns clock cycle) and can be very small in size (< 500 λ by 500 λ). The system is composed of five software tools that have been designed to work together. The designer inputs an algorithmic description of the application architecture, and the design system outputs the layouts of the chip set for the application architecture. While many of these tools require a large amount of run time, they allow efficient automatic production of chip sets for applications that before could only be done by hand and therefore were virtually intractable problems.

Original languageEnglish (US)
Title of host publicationProceedings of the Hawaii International Conference on System Science
PublisherPubl by IEEE
Pages102-110
Number of pages9
Volume1
ISBN (Print)0818619112
StatePublished - 1989
EventProceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences: Architecture Track - Kailua-Kona, Hawaii, USA
Duration: Jan 3 1989Jan 6 1989

Other

OtherProceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences: Architecture Track
CityKailua-Kona, Hawaii, USA
Period1/3/891/6/89

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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