Reducing dTLB energy through dynamic resizing

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant energy in some architectures. In addition, its power density is high, due to its small area. Consequently, reducing power consumption of TLB is important for both high-end and low-end systems. While a large TLB might be preferable from the performance angle, it can also lead to excessive dynamic energy consumption. This paper focuses on data TLB (dTLB), and proposes an architectural solution to this problem which is based on dynamically resizing the dTLB considering application execution behavior. Our objective is to give the application the minimum dTLB size (at any point) without significantly degrading its performance. We present two different implementations of this idea, and give experimental data demonstrating that it is very effective in practice.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Pages358-363
Number of pages6
StatePublished - 2003
EventProceedings: 21st International Conference on Computer Design ICCD 2003 - San Jose, CA, United States
Duration: Oct 13 2003Oct 15 2003

Other

OtherProceedings: 21st International Conference on Computer Design ICCD 2003
CountryUnited States
CitySan Jose, CA
Period10/13/0310/15/03

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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    Delaluz, V., Kandemir, M., Sivasubramaniam, A., Irwin, M. J., & Narayanan, V. (2003). Reducing dTLB energy through dynamic resizing. In Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors (pp. 358-363)