Reducing power through compiler-directed barrier synchronization elimination

Mahmut Kandemir, Woo Son Seung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, many parallelizing compilers are very conservative in inserting barrier synchronizations at the end of each and every parallel loop. This can lead to significant power consumption in chip multiprocessor based execution environments. This paper proposes a compiler-directed approach for eliminating such synchronization calls between neighboring parallel loops. It achieves its goal by partitioning loop iterations across processors such that each processor executes iterations from both the loops that access the same set of array elements. We implemented the proposed approach using an experimental compilation framework and made experiments with ten SPEC benchmark codes. Our experiments clearly show that the proposed compiler-directed approach is very effective and reduces energy overheads due to synchronizations by about 75.5%, and this corresponds to around 5.48% saving on average in overall energy consumption.

Original languageEnglish (US)
Title of host publicationISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design
Pages354-357
Number of pages4
DOIs
StatePublished - Dec 1 2006
EventISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design - Tegernsee, Bavaria, Germany
Duration: Oct 4 2006Oct 6 2006

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2006
ISSN (Print)1533-4678

Other

OtherISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design
CountryGermany
CityTegernsee, Bavaria
Period10/4/0610/6/06

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Kandemir, M., & Seung, W. S. (2006). Reducing power through compiler-directed barrier synchronization elimination. In ISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design (pp. 354-357). (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2006). https://doi.org/10.1145/1165573.1165657