ReveNAND: A fast-drift-aware resilient 3d NAND flash design

Mustafa M. Shihab, Jie Zhang, Myoungsoo Jung, Mahmut Kandemir

Research output: Contribution to journalArticle

Abstract

The paradigm shift from planar (two dimensional (2D)) to vertical (three-dimensional (3D)) models has placed theNANDflash technology on the verge of a design evolution that can handle the demands of next-generation storage applications. However it also introduces challenges that may obstruct the realization of such 3D NAND flash. Specifically we observed that the fast threshold drift (fast-drift) in a charge-trap flash-based 3D NAND cell can make it lose a critical fraction of the stored charge relatively soon after programming and generate errors. In this work we first present an elastic read reference (VRef ) scheme (ERR) for reducing such errors in ReveNAND-our fast-drift aware 3D NAND design. To address the inherent limitation of the adaptive VRef we introduce a new intra-block page organization (hitch-hike) that can enable stronger error correction for the error-prone pages. In addition we propose a novel reinforcement-learning-based smart data refill scheme (iRefill) to counter the impact of fast-drift with minimum performance and hardware overhead. Finally we present the first analytic model to characterize fast-drift and evaluate its system-level impact. Our results show that compared to conventional 3D NAND design our ReveNAND can reduce fast-drift errors by 87% on average and can lower the ECC latency and energy overheads by 13× and 10× respectively.

Original languageEnglish (US)
Article number17
JournalACM Transactions on Architecture and Code Optimization
Volume15
Issue number2
DOIs
StatePublished - Apr 2018

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Reinforcement learning
Error correction
Hardware

All Science Journal Classification (ASJC) codes

  • Software
  • Information Systems
  • Hardware and Architecture

Cite this

@article{9ee025c31cca42d4b4a78a6af0e6f31c,
title = "ReveNAND: A fast-drift-aware resilient 3d NAND flash design",
abstract = "The paradigm shift from planar (two dimensional (2D)) to vertical (three-dimensional (3D)) models has placed theNANDflash technology on the verge of a design evolution that can handle the demands of next-generation storage applications. However it also introduces challenges that may obstruct the realization of such 3D NAND flash. Specifically we observed that the fast threshold drift (fast-drift) in a charge-trap flash-based 3D NAND cell can make it lose a critical fraction of the stored charge relatively soon after programming and generate errors. In this work we first present an elastic read reference (VRef ) scheme (ERR) for reducing such errors in ReveNAND-our fast-drift aware 3D NAND design. To address the inherent limitation of the adaptive VRef we introduce a new intra-block page organization (hitch-hike) that can enable stronger error correction for the error-prone pages. In addition we propose a novel reinforcement-learning-based smart data refill scheme (iRefill) to counter the impact of fast-drift with minimum performance and hardware overhead. Finally we present the first analytic model to characterize fast-drift and evaluate its system-level impact. Our results show that compared to conventional 3D NAND design our ReveNAND can reduce fast-drift errors by 87{\%} on average and can lower the ECC latency and energy overheads by 13× and 10× respectively.",
author = "Shihab, {Mustafa M.} and Jie Zhang and Myoungsoo Jung and Mahmut Kandemir",
year = "2018",
month = "4",
doi = "10.1145/3184744",
language = "English (US)",
volume = "15",
journal = "Transactions on Architecture and Code Optimization",
issn = "1544-3566",
publisher = "Association for Computing Machinery (ACM)",
number = "2",

}

ReveNAND : A fast-drift-aware resilient 3d NAND flash design. / Shihab, Mustafa M.; Zhang, Jie; Jung, Myoungsoo; Kandemir, Mahmut.

In: ACM Transactions on Architecture and Code Optimization, Vol. 15, No. 2, 17, 04.2018.

Research output: Contribution to journalArticle

TY - JOUR

T1 - ReveNAND

T2 - A fast-drift-aware resilient 3d NAND flash design

AU - Shihab, Mustafa M.

AU - Zhang, Jie

AU - Jung, Myoungsoo

AU - Kandemir, Mahmut

PY - 2018/4

Y1 - 2018/4

N2 - The paradigm shift from planar (two dimensional (2D)) to vertical (three-dimensional (3D)) models has placed theNANDflash technology on the verge of a design evolution that can handle the demands of next-generation storage applications. However it also introduces challenges that may obstruct the realization of such 3D NAND flash. Specifically we observed that the fast threshold drift (fast-drift) in a charge-trap flash-based 3D NAND cell can make it lose a critical fraction of the stored charge relatively soon after programming and generate errors. In this work we first present an elastic read reference (VRef ) scheme (ERR) for reducing such errors in ReveNAND-our fast-drift aware 3D NAND design. To address the inherent limitation of the adaptive VRef we introduce a new intra-block page organization (hitch-hike) that can enable stronger error correction for the error-prone pages. In addition we propose a novel reinforcement-learning-based smart data refill scheme (iRefill) to counter the impact of fast-drift with minimum performance and hardware overhead. Finally we present the first analytic model to characterize fast-drift and evaluate its system-level impact. Our results show that compared to conventional 3D NAND design our ReveNAND can reduce fast-drift errors by 87% on average and can lower the ECC latency and energy overheads by 13× and 10× respectively.

AB - The paradigm shift from planar (two dimensional (2D)) to vertical (three-dimensional (3D)) models has placed theNANDflash technology on the verge of a design evolution that can handle the demands of next-generation storage applications. However it also introduces challenges that may obstruct the realization of such 3D NAND flash. Specifically we observed that the fast threshold drift (fast-drift) in a charge-trap flash-based 3D NAND cell can make it lose a critical fraction of the stored charge relatively soon after programming and generate errors. In this work we first present an elastic read reference (VRef ) scheme (ERR) for reducing such errors in ReveNAND-our fast-drift aware 3D NAND design. To address the inherent limitation of the adaptive VRef we introduce a new intra-block page organization (hitch-hike) that can enable stronger error correction for the error-prone pages. In addition we propose a novel reinforcement-learning-based smart data refill scheme (iRefill) to counter the impact of fast-drift with minimum performance and hardware overhead. Finally we present the first analytic model to characterize fast-drift and evaluate its system-level impact. Our results show that compared to conventional 3D NAND design our ReveNAND can reduce fast-drift errors by 87% on average and can lower the ECC latency and energy overheads by 13× and 10× respectively.

UR - http://www.scopus.com/inward/record.url?scp=85047115212&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85047115212&partnerID=8YFLogxK

U2 - 10.1145/3184744

DO - 10.1145/3184744

M3 - Article

AN - SCOPUS:85047115212

VL - 15

JO - Transactions on Architecture and Code Optimization

JF - Transactions on Architecture and Code Optimization

SN - 1544-3566

IS - 2

M1 - 17

ER -