Scheduler-based DRAM energy management

Research output: Chapter in Book/Report/Conference proceedingConference contribution

104 Citations (Scopus)

Abstract

Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operating modes. While hardware-based techniques require extra logic to keep track of memory references and make decisions about future mode transitions, compiler-directed schemes can only work on a single application at a time and demand sophisticated program analysis support, In this work, we present an operating system (OS) based solution where the OS scheduler directs the power mode transitions by keeping track of module accesses for each process in the system. This global view combined with the flexibility of a software approach brings large energy savings at no extra hardware cost. Our implementation using a full-fledged OS shows that the proposed technique is also very robust when different system and workload parameters are modified, and provides the first set of experimental results for memory energy optimization with a multi-programmed workload on a real platform. The proposed technique is applicable to both embedded systems and high-end computing platforms.

Original languageEnglish (US)
Title of host publicationProceedings of the 39th Annual Design Automation Conference, DAC'02
Pages697-702
Number of pages6
StatePublished - Aug 31 2002
Event39th Annual Design Automation Conference, DAC'02 - New Orleans, LA, United States
Duration: Jun 10 2002Jun 14 2002

Other

Other39th Annual Design Automation Conference, DAC'02
CountryUnited States
CityNew Orleans, LA
Period6/10/026/14/02

Fingerprint

Dynamic random access storage
Energy management
Data storage equipment
Hardware
Embedded systems
Computer hardware
Energy conservation
Costs

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering

Cite this

Delaluz, V., Sivasubramaniam, A., Kandemir, M., Narayanan, V., & Irwin, M. J. (2002). Scheduler-based DRAM energy management. In Proceedings of the 39th Annual Design Automation Conference, DAC'02 (pp. 697-702)
Delaluz, V. ; Sivasubramaniam, Anand ; Kandemir, Mahmut ; Narayanan, Vijaykrishnan ; Irwin, M. J. / Scheduler-based DRAM energy management. Proceedings of the 39th Annual Design Automation Conference, DAC'02. 2002. pp. 697-702
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Delaluz, V, Sivasubramaniam, A, Kandemir, M, Narayanan, V & Irwin, MJ 2002, Scheduler-based DRAM energy management. in Proceedings of the 39th Annual Design Automation Conference, DAC'02. pp. 697-702, 39th Annual Design Automation Conference, DAC'02, New Orleans, LA, United States, 6/10/02.

Scheduler-based DRAM energy management. / Delaluz, V.; Sivasubramaniam, Anand; Kandemir, Mahmut; Narayanan, Vijaykrishnan; Irwin, M. J.

Proceedings of the 39th Annual Design Automation Conference, DAC'02. 2002. p. 697-702.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Delaluz V, Sivasubramaniam A, Kandemir M, Narayanan V, Irwin MJ. Scheduler-based DRAM energy management. In Proceedings of the 39th Annual Design Automation Conference, DAC'02. 2002. p. 697-702