Side-channel attack on STTRAM based cache for cryptographic application

Mohammad Nasim Imtiaz Khan, Shivam Bhasin, Alex Yuan, Anupam Chattopadhyay, Swaroop Ghosh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

In this paper, we propose a Side Channel Attack (SCA) model on Spin-Torque Transfer RAM (STTRAM) where an adversary can monitor the supply current of the memory array consumed during read/write operations and recover the secret key of Advanced Encryption Standard (AES) execution. Simulation results indicate that by monitoring write current, 50% of keys could be extracted using 2000 traces. Further improvement of attacks on write operation is also proposed. The read current is found to be more susceptible to leak the key. It reveals first byte in only 40 traces and leaks the entire key in as low as 400 traces. The results are then compared with Static RAM (SRAM) based cache. The attack model has been experimentally validated on read operation of commercial MRAM chip (STTRAM variant). Experimental results indicate that the attack can reveal correct key in 15 traces compared to 40 in simulation due to less algorithmic noise. To the best of our knowledge, this is the first comprehensive SCA study for STTRAM based cache for cryptographic application.

Original languageEnglish (US)
Title of host publicationProceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages33-40
Number of pages8
ISBN (Electronic)9781538622544
DOIs
StatePublished - Nov 22 2017
Event35th IEEE International Conference on Computer Design, ICCD 2017 - Boston, United States
Duration: Nov 5 2017Nov 8 2017

Publication series

NameProceedings - 35th IEEE International Conference on Computer Design, ICCD 2017

Other

Other35th IEEE International Conference on Computer Design, ICCD 2017
CountryUnited States
CityBoston
Period11/5/1711/8/17

    Fingerprint

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

Cite this

Khan, M. N. I., Bhasin, S., Yuan, A., Chattopadhyay, A., & Ghosh, S. (2017). Side-channel attack on STTRAM based cache for cryptographic application. In Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017 (pp. 33-40). [8119187] (Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCD.2017.14