Spin dependent trapping in a polycrystalline silicon integrated circuit resistor

W. K. Schubert, Patrick M. Lenahan

Research output: Contribution to journalArticle

10 Citations (Scopus)

Abstract

Spin dependent trapping of majority carriers at trivalent silicon centers in the grain boundaries of a polycrystalline silicon integrated circuit resistor has been observed. The phenomenon has been studied both in a silicon bicrystal and in thin-film polycrystalline silicon with essentially identical results. This not only identifies the trapping center responsible for the large barriers observed at silicon grain boundaries, but also demonstrates that the technique has the sensitivity required to work with actual microelectronic devices.

Original languageEnglish (US)
Pages (from-to)497-499
Number of pages3
JournalApplied Physics Letters
Volume43
Issue number5
DOIs
StatePublished - Dec 1 1983

Fingerprint

resistors
integrated circuits
trapping
silicon
grain boundaries
majority carriers
bicrystals
microelectronics
sensitivity
thin films

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

Cite this

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Spin dependent trapping in a polycrystalline silicon integrated circuit resistor. / Schubert, W. K.; Lenahan, Patrick M.

In: Applied Physics Letters, Vol. 43, No. 5, 01.12.1983, p. 497-499.

Research output: Contribution to journalArticle

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