TY - JOUR
T1 - SPX64
T2 - A Scratchpad Memory for General-purpose Microprocessors
AU - Singh, Abhishek
AU - Dave, Shail
AU - Zardoshti, Pantea
AU - Brotzman, Robert
AU - Zhang, Chao
AU - Guo, Xiaochen
AU - Shrivastava, Aviral
AU - Tan, Gang
AU - Spear, Michael
N1 - Funding Information:
New article, not an extension of a conference paper. This work was partially supported by the Intel and NSF joint research program for Computer Assisted Programming for Heterogeneous Architectures (CAPA). At Lehigh University, this work was supported under grant CCF-1723624 and CCF-1750826. At the Arizona State University, this work was supported under grant and CCF-1723476 and CNS-1525855. At the Pennsylvania State University, this work was supported under grant CCF-1723571. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of Intel or the National Science Foundation. Authors’ addresses: A. Singh, C. Zhang, and X. Guo, Department of Electrical and Computer Engineering, 19 Memorial Drive West, Bethlehem, PA 18015; emails: {abs218, chz616, xig515}@lehigh.edu; S. Dave and A. Shrivastava, 699 S. Mill Ave, Suite 203-15 Centerpoint, Tempe, AZ 85281; emails: {Aviral.Shrivastava, Shail.Dave}@asu.edu; P. Zardoshti and M. Spear, Computer Science and Engineering Department, 113 Research Drive, Bethlehem PA 18015; emails: {mfs409, paz215}@lehigh.edu; R. Brotzman and G. Tan, W358 Westgate Building, Dept. of Computer Science & Engineering, The Penn State University, University Park, PA 16802, USA; emails: rcb44@psu.edu, gtan@cse.psu.edu.
Publisher Copyright:
© 2020 ACM.
PY - 2021/1
Y1 - 2021/1
N2 - General-purpose computing systems employ memory hierarchies to provide the appearance of a single large, fast, coherent memory. In special-purpose CPUs, programmers manually manage distinct, non-coherent scratchpad memories. In this article, we combine these mechanisms by adding a virtually addressed, set-associative scratchpad to a general purpose CPU. Our scratchpad exists alongside a traditional cache and is able to avoid many of the programming challenges associated with traditional scratchpads without sacrificing generality (e.g., virtualization). Furthermore, our design delivers increased security and improves performance, especially for workloads with high locality or that interact with nonvolatile memory.
AB - General-purpose computing systems employ memory hierarchies to provide the appearance of a single large, fast, coherent memory. In special-purpose CPUs, programmers manually manage distinct, non-coherent scratchpad memories. In this article, we combine these mechanisms by adding a virtually addressed, set-associative scratchpad to a general purpose CPU. Our scratchpad exists alongside a traditional cache and is able to avoid many of the programming challenges associated with traditional scratchpads without sacrificing generality (e.g., virtualization). Furthermore, our design delivers increased security and improves performance, especially for workloads with high locality or that interact with nonvolatile memory.
UR - http://www.scopus.com/inward/record.url?scp=85099784949&partnerID=8YFLogxK
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U2 - 10.1145/3436730
DO - 10.1145/3436730
M3 - Article
AN - SCOPUS:85099784949
VL - 18
JO - Transactions on Architecture and Code Optimization
JF - Transactions on Architecture and Code Optimization
SN - 1544-3566
IS - 1
M1 - 14
ER -