Steep slope 2D strain field effect transistor

2D-SFET

Daniel Schulman, Andrew Arnold, Saptarshi Das

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Numerous advancements have allowed continuous aggressive dimensional scaling of CMOS to the current state of the art 10nm node but none are solutions to the fundamental Boltzmann statistics limits which have stalled Dennard voltage scaling. The semiconductor industry has invested heavily in disruptive, 'steep slope' transistor technologies which promise lower operating voltages and dramatically reduced power consumption. While many of these technologies show great promise such as Tunnel FETs, Phase Change FETs, and even nanomechanical switches, all are far from commercialization and large-scale integration due to issues ranging from poor ON currents, limited switching ranges and reliability[4, 5].

Original languageEnglish (US)
Title of host publication2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-2
Number of pages2
ISBN (Electronic)9781538648254
DOIs
StatePublished - Jul 3 2018
Event2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018 - Hsinchu, Taiwan, Province of China
Duration: Apr 16 2018Apr 19 2018

Other

Other2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
CountryTaiwan, Province of China
CityHsinchu
Period4/16/184/19/18

Fingerprint

Field effect transistors
field effect transistors
slopes
scaling
LSI circuits
commercialization
large scale integration
electric potential
tunnels
CMOS
Tunnels
Transistors
Electric power utilization
transistors
switches
industries
Switches
Statistics
statistics
Semiconductor materials

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Instrumentation
  • Electronic, Optical and Magnetic Materials

Cite this

Schulman, D., Arnold, A., & Das, S. (2018). Steep slope 2D strain field effect transistor: 2D-SFET. In 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018 (pp. 1-2). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2018.8403841
Schulman, Daniel ; Arnold, Andrew ; Das, Saptarshi. / Steep slope 2D strain field effect transistor : 2D-SFET. 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1-2
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Schulman, D, Arnold, A & Das, S 2018, Steep slope 2D strain field effect transistor: 2D-SFET. in 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. Institute of Electrical and Electronics Engineers Inc., pp. 1-2, 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018, Hsinchu, Taiwan, Province of China, 4/16/18. https://doi.org/10.1109/VLSI-TSA.2018.8403841

Steep slope 2D strain field effect transistor : 2D-SFET. / Schulman, Daniel; Arnold, Andrew; Das, Saptarshi.

2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-2.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Schulman D, Arnold A, Das S. Steep slope 2D strain field effect transistor: 2D-SFET. In 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1-2 https://doi.org/10.1109/VLSI-TSA.2018.8403841