Steep slope 2D strain field effect transistor: 2D-SFET

Daniel Schulman, Andrew Arnold, Saptarshi Das

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Numerous advancements have allowed continuous aggressive dimensional scaling of CMOS to the current state of the art 10nm node but none are solutions to the fundamental Boltzmann statistics limits which have stalled Dennard voltage scaling. The semiconductor industry has invested heavily in disruptive, 'steep slope' transistor technologies which promise lower operating voltages and dramatically reduced power consumption. While many of these technologies show great promise such as Tunnel FETs, Phase Change FETs, and even nanomechanical switches, all are far from commercialization and large-scale integration due to issues ranging from poor ON currents, limited switching ranges and reliability[4, 5].

Original languageEnglish (US)
Title of host publication2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-2
Number of pages2
ISBN (Electronic)9781538648254
DOIs
StatePublished - Jul 3 2018
Event2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018 - Hsinchu, Taiwan, Province of China
Duration: Apr 16 2018Apr 19 2018

Publication series

Name2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018

Other

Other2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
CountryTaiwan, Province of China
CityHsinchu
Period4/16/184/19/18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Instrumentation
  • Electronic, Optical and Magnetic Materials

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