Submicron-gate-length GaAs MESFETs

Thomas Nelson Jackson, B. J. Van Zeghbroeck, G. Pepper, J. F. DeGelormo, T. Keuch, H. Meier, P. Wolf

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

It is well known that reducing gate length is a powerful means to increase the transconductance and transit frequency of GaAs MESFET devices. However, by reducing the gate length without scaling channel doping and thickness, the performance obtained is limited by short-channel effects and parasitics. In this paper we present an overview of our work on two different MESFET structures, illustrating how device performance can be increased by decreasing the gate length, with the result that appropriately scaled MESFETs compare favorably with GaAs-AlGaAs heterojunction FETs. From our work - including some recent results on 0.15-μm-gate-length implantation-self-aligned MESFETs - we conclude that it should be possible to increase the speed of high-speed GaAs MESFET (logic, analog, and microwave) circuits through the use of devices having gate lengths less than 0.5 μm.

Original languageEnglish (US)
Pages (from-to)495-505
Number of pages11
JournalIBM Journal of Research and Development
Volume34
Issue number4
DOIs
StatePublished - Jan 1 1990

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

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    Jackson, T. N., Van Zeghbroeck, B. J., Pepper, G., DeGelormo, J. F., Keuch, T., Meier, H., & Wolf, P. (1990). Submicron-gate-length GaAs MESFETs. IBM Journal of Research and Development, 34(4), 495-505. https://doi.org/10.1147/rd.344.0495