Techniques for Designing Energy-Aware MPSoCs

Mary Jane Irwin, Luca Benini, Vijaykrishnan Narayanan, Mahmut Kandemir

Research output: Chapter in Book/Report/Conference proceedingChapter

3 Citations (Scopus)

Abstract

This chapter reviews several energy-aware design techniques for controlling both active and standby power consumptions that are applicable to MPSoCs. The techniques discussed are for multiprocessor systems-on-chips (MPSoC) processor cores, the on-chip memory hierarchy, the on-chip communication system, and MPSoC energy-aware software. The majority of the techniques are derived from existing uni-processor energy-aware systems that take on new dimensions in the MPSoC space. Techniques for energy and power consumption reduction are successfully applied at all levels of the design space in uni-processor systems-circuit, logic gate, functional unit, processor, system software, and application software levels. The primary focus has been on reducing active power. As technology continues to scale up, accompanied by reductions in the supply and threshold voltages, the percentage of the power budget due to standby energy has driven the development of additional techniques for reducing standby energy.

Original languageEnglish (US)
Title of host publicationMultiprocessor Systems-on-Chips
PublisherElsevier Inc.
Pages21-47
Number of pages27
ISBN (Print)9780123852519
DOIs
StatePublished - Dec 1 2005

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Electric power utilization
Logic gates
Threshold voltage
Application programs
Communication systems
Computer systems
Energy utilization
Data storage equipment
Networks (circuits)
System-on-chip

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Cite this

Irwin, M. J., Benini, L., Narayanan, V., & Kandemir, M. (2005). Techniques for Designing Energy-Aware MPSoCs. In Multiprocessor Systems-on-Chips (pp. 21-47). Elsevier Inc.. https://doi.org/10.1016/B978-012385251-9/50016-5
Irwin, Mary Jane ; Benini, Luca ; Narayanan, Vijaykrishnan ; Kandemir, Mahmut. / Techniques for Designing Energy-Aware MPSoCs. Multiprocessor Systems-on-Chips. Elsevier Inc., 2005. pp. 21-47
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Irwin, MJ, Benini, L, Narayanan, V & Kandemir, M 2005, Techniques for Designing Energy-Aware MPSoCs. in Multiprocessor Systems-on-Chips. Elsevier Inc., pp. 21-47. https://doi.org/10.1016/B978-012385251-9/50016-5

Techniques for Designing Energy-Aware MPSoCs. / Irwin, Mary Jane; Benini, Luca; Narayanan, Vijaykrishnan; Kandemir, Mahmut.

Multiprocessor Systems-on-Chips. Elsevier Inc., 2005. p. 21-47.

Research output: Chapter in Book/Report/Conference proceedingChapter

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Irwin MJ, Benini L, Narayanan V, Kandemir M. Techniques for Designing Energy-Aware MPSoCs. In Multiprocessor Systems-on-Chips. Elsevier Inc. 2005. p. 21-47 https://doi.org/10.1016/B978-012385251-9/50016-5