Technology development & design for 22 nm InGaAs/InP-channel MOSFETs

M. J.W. Rodwell, M. Wistey, U. Singisetti, G. Burek, A. Gossard, S. Stemmer, Roman Engel-Herbert, Y. Hwang, Y. Zheng, C. Van De Walle, P. Asbeck, Y. Taur, A. Kummel, B. Yu, D. Wang, Y. Yuan, C. Palmstrøm, Erdem Arkun, Paul Simmonds, P. McIntyreJ. Harris, M. V. Fischetti, C. Sachs

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Because of the low electron effective mass and the high resulting carrier velocities, we are developing InGaAs/InP MOSFETs for potential application in VLSI circuits at scaling generations beyond 22 nm. We will report device design, review gate dielectric growth processes, and describe in detail the development of process modules for fabrication of fully selfaligned enhancement-mode devices. Key design challenges include the effect of the low density of states upon drive current and the effect of the low carrier mass on vertical confinement. Target electrical parameters include ̃5 mA/μm drive current and ̃7 mS/μm 2 transconductance. Key fabrication challenges include formation of self-aligned N+ source and drain contacts with < 15 ωμm and < 1 ωμm2 resistivity, and the formation and patterning of the gate metal and dielectric without damage to the thin underlying 4-6 nm channel layer.

Original languageEnglish (US)
Title of host publication2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008
DOIs
StatePublished - Dec 1 2008
Event2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008 - Versailles, France
Duration: May 25 2008May 29 2008

Other

Other2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008
CountryFrance
CityVersailles
Period5/25/085/29/08

Fingerprint

Fabrication
VLSI circuits
Gate dielectrics
Transconductance
Metals
Electrons

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Rodwell, M. J. W., Wistey, M., Singisetti, U., Burek, G., Gossard, A., Stemmer, S., ... Sachs, C. (2008). Technology development & design for 22 nm InGaAs/InP-channel MOSFETs. In 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008 [4703065] https://doi.org/10.1109/ICIPRM.2008.4703065
Rodwell, M. J.W. ; Wistey, M. ; Singisetti, U. ; Burek, G. ; Gossard, A. ; Stemmer, S. ; Engel-Herbert, Roman ; Hwang, Y. ; Zheng, Y. ; Van De Walle, C. ; Asbeck, P. ; Taur, Y. ; Kummel, A. ; Yu, B. ; Wang, D. ; Yuan, Y. ; Palmstrøm, C. ; Arkun, Erdem ; Simmonds, Paul ; McIntyre, P. ; Harris, J. ; Fischetti, M. V. ; Sachs, C. / Technology development & design for 22 nm InGaAs/InP-channel MOSFETs. 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008. 2008.
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title = "Technology development & design for 22 nm InGaAs/InP-channel MOSFETs",
abstract = "Because of the low electron effective mass and the high resulting carrier velocities, we are developing InGaAs/InP MOSFETs for potential application in VLSI circuits at scaling generations beyond 22 nm. We will report device design, review gate dielectric growth processes, and describe in detail the development of process modules for fabrication of fully selfaligned enhancement-mode devices. Key design challenges include the effect of the low density of states upon drive current and the effect of the low carrier mass on vertical confinement. Target electrical parameters include ̃5 mA/μm drive current and ̃7 mS/μm 2 transconductance. Key fabrication challenges include formation of self-aligned N+ source and drain contacts with < 15 ωμm and < 1 ωμm2 resistivity, and the formation and patterning of the gate metal and dielectric without damage to the thin underlying 4-6 nm channel layer.",
author = "Rodwell, {M. J.W.} and M. Wistey and U. Singisetti and G. Burek and A. Gossard and S. Stemmer and Roman Engel-Herbert and Y. Hwang and Y. Zheng and {Van De Walle}, C. and P. Asbeck and Y. Taur and A. Kummel and B. Yu and D. Wang and Y. Yuan and C. Palmstr{\o}m and Erdem Arkun and Paul Simmonds and P. McIntyre and J. Harris and Fischetti, {M. V.} and C. Sachs",
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Rodwell, MJW, Wistey, M, Singisetti, U, Burek, G, Gossard, A, Stemmer, S, Engel-Herbert, R, Hwang, Y, Zheng, Y, Van De Walle, C, Asbeck, P, Taur, Y, Kummel, A, Yu, B, Wang, D, Yuan, Y, Palmstrøm, C, Arkun, E, Simmonds, P, McIntyre, P, Harris, J, Fischetti, MV & Sachs, C 2008, Technology development & design for 22 nm InGaAs/InP-channel MOSFETs. in 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008., 4703065, 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008, Versailles, France, 5/25/08. https://doi.org/10.1109/ICIPRM.2008.4703065

Technology development & design for 22 nm InGaAs/InP-channel MOSFETs. / Rodwell, M. J.W.; Wistey, M.; Singisetti, U.; Burek, G.; Gossard, A.; Stemmer, S.; Engel-Herbert, Roman; Hwang, Y.; Zheng, Y.; Van De Walle, C.; Asbeck, P.; Taur, Y.; Kummel, A.; Yu, B.; Wang, D.; Yuan, Y.; Palmstrøm, C.; Arkun, Erdem; Simmonds, Paul; McIntyre, P.; Harris, J.; Fischetti, M. V.; Sachs, C.

2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008. 2008. 4703065.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Technology development & design for 22 nm InGaAs/InP-channel MOSFETs

AU - Rodwell, M. J.W.

AU - Wistey, M.

AU - Singisetti, U.

AU - Burek, G.

AU - Gossard, A.

AU - Stemmer, S.

AU - Engel-Herbert, Roman

AU - Hwang, Y.

AU - Zheng, Y.

AU - Van De Walle, C.

AU - Asbeck, P.

AU - Taur, Y.

AU - Kummel, A.

AU - Yu, B.

AU - Wang, D.

AU - Yuan, Y.

AU - Palmstrøm, C.

AU - Arkun, Erdem

AU - Simmonds, Paul

AU - McIntyre, P.

AU - Harris, J.

AU - Fischetti, M. V.

AU - Sachs, C.

PY - 2008/12/1

Y1 - 2008/12/1

N2 - Because of the low electron effective mass and the high resulting carrier velocities, we are developing InGaAs/InP MOSFETs for potential application in VLSI circuits at scaling generations beyond 22 nm. We will report device design, review gate dielectric growth processes, and describe in detail the development of process modules for fabrication of fully selfaligned enhancement-mode devices. Key design challenges include the effect of the low density of states upon drive current and the effect of the low carrier mass on vertical confinement. Target electrical parameters include ̃5 mA/μm drive current and ̃7 mS/μm 2 transconductance. Key fabrication challenges include formation of self-aligned N+ source and drain contacts with < 15 ωμm and < 1 ωμm2 resistivity, and the formation and patterning of the gate metal and dielectric without damage to the thin underlying 4-6 nm channel layer.

AB - Because of the low electron effective mass and the high resulting carrier velocities, we are developing InGaAs/InP MOSFETs for potential application in VLSI circuits at scaling generations beyond 22 nm. We will report device design, review gate dielectric growth processes, and describe in detail the development of process modules for fabrication of fully selfaligned enhancement-mode devices. Key design challenges include the effect of the low density of states upon drive current and the effect of the low carrier mass on vertical confinement. Target electrical parameters include ̃5 mA/μm drive current and ̃7 mS/μm 2 transconductance. Key fabrication challenges include formation of self-aligned N+ source and drain contacts with < 15 ωμm and < 1 ωμm2 resistivity, and the formation and patterning of the gate metal and dielectric without damage to the thin underlying 4-6 nm channel layer.

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U2 - 10.1109/ICIPRM.2008.4703065

DO - 10.1109/ICIPRM.2008.4703065

M3 - Conference contribution

AN - SCOPUS:70149105093

SN - 9781424422593

BT - 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008

ER -

Rodwell MJW, Wistey M, Singisetti U, Burek G, Gossard A, Stemmer S et al. Technology development & design for 22 nm InGaAs/InP-channel MOSFETs. In 2008 International Conference on Indium Phosphide and Related Materials, IPRM 2008. 2008. 4703065 https://doi.org/10.1109/ICIPRM.2008.4703065