Temperature-aware voltage islands architecting in system-on-chip design

W. L. Hung, G. M. Link, Yuan Xie, Vijaykrishnan Narayanan, N. Dhanwada, J. Conner

Research output: Chapter in Book/Report/Conference proceedingConference contribution

41 Scopus citations

Abstract

As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC performance, power, and reliability. In view of this, we present a hybrid optimization approach which aims at temperature reduction and hot spot elimination. We demonstrate that considerable improvement in the thermal distribution of a design can be achieved through careful voltage island partitioning, voltage level assignment, and voltage island floorplanning. The experimental results on MCNC benchmarks show significant improvement on the thermal profiles. To the best of our knowledge, this is the first work to explore the thermal impacts of voltage islands.

Original languageEnglish (US)
Title of host publicationProceedings - 2005 IEEE International Conference on Computer Design
Subtitle of host publicationVLSI in Computers and Processors, ICCD 2005
Pages689-694
Number of pages6
DOIs
StatePublished - Dec 1 2005
Event2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005 - San Jose, CA, United States
Duration: Oct 2 2005Oct 5 2005

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Volume2005
ISSN (Print)1063-6404

Other

Other2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005
CountryUnited States
CitySan Jose, CA
Period10/2/0510/5/05

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Hung, W. L., Link, G. M., Xie, Y., Narayanan, V., Dhanwada, N., & Conner, J. (2005). Temperature-aware voltage islands architecting in system-on-chip design. In Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005 (pp. 689-694). [1524227] (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors; Vol. 2005). https://doi.org/10.1109/ICCD.2005.103