Test Methodologies and Test-Time Compression for Emerging Non-Volatile Memory

Mohammad Nasim Imtiaz Khan, Swaroop Ghosh

Research output: Contribution to journalArticlepeer-review


Emerging nonvolatile memories (NVMs) are considered as suitable candidates to replace conventional memories such as static RAM (SRAM) and dynamic RAM (DRAM) due to high density, high performance, and low (static) power operation. However, NVMs bring new fault issues and call for new tests. For example, NVMs exhibit wide read and write latency distribution, incur high write current (leads to high supply noise), are susceptible to external magnetic/thermal field, show high and stochastic retention time, and are prone to endurance and reliability failures. The conventional tests either cannot capture the faults specific to emerging NVMs or they incur significant test time if implemented on emerging NVMs. In this article, we summarize fault models specific to NVMs and explain the related test issues and challenges. We also propose new tests along with necessary design-for-test techniques to characterize the failures. We further summarize NVM tests proposed in prior works and analyze their test time requirements.

Original languageEnglish (US)
Article number8890751
Pages (from-to)1387-1397
Number of pages11
JournalIEEE Transactions on Reliability
Issue number4
StatePublished - Dec 2020

All Science Journal Classification (ASJC) codes

  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering


Dive into the research topics of 'Test Methodologies and Test-Time Compression for Emerging Non-Volatile Memory'. Together they form a unique fingerprint.

Cite this