Three-dimensional cache design exploration using 3DCacti

Yuh Fang Tsai, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

83 Citations (Scopus)

Abstract

As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a way to mitigate the interconnect challenges. In this paper, we explore the architectural design of cache memories using 3D circuits. We present a delay and energy model, 3DCacti, to explore different 3D design options of partitioning a cache. The tool allows partitioning of the cache across different device layers at various levels of granularity. The tool has been validated by comparing its results with those obtained from circuit simulation of custom 3D layouts. We also explore the effects of various cache partitioning parameters and 3D technology parameters on delay and energy to demonstrate the utility of the tool.

Original languageEnglish (US)
Title of host publicationProceedings - 2005 IEEE International Conference on Computer Design
Subtitle of host publicationVLSI in Computers and Processors, ICCD 2005
Pages519-524
Number of pages6
DOIs
StatePublished - Dec 1 2005
Event2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005 - San Jose, CA, United States
Duration: Oct 2 2005Oct 5 2005

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Volume2005
ISSN (Print)1063-6404

Other

Other2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005
CountryUnited States
CitySan Jose, CA
Period10/2/0510/5/05

Fingerprint

Cache memory
Architectural design
Circuit simulation
Networks (circuits)
Three dimensional integrated circuits

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Tsai, Y. F., Xie, Y., Narayanan, V., & Irwin, M. J. (2005). Three-dimensional cache design exploration using 3DCacti. In Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005 (pp. 519-524). [1524202] (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors; Vol. 2005). https://doi.org/10.1109/ICCD.2005.108
Tsai, Yuh Fang ; Xie, Yuan ; Narayanan, Vijaykrishnan ; Irwin, Mary Jane. / Three-dimensional cache design exploration using 3DCacti. Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005. 2005. pp. 519-524 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).
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Tsai, YF, Xie, Y, Narayanan, V & Irwin, MJ 2005, Three-dimensional cache design exploration using 3DCacti. in Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005., 1524202, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, vol. 2005, pp. 519-524, 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005, San Jose, CA, United States, 10/2/05. https://doi.org/10.1109/ICCD.2005.108

Three-dimensional cache design exploration using 3DCacti. / Tsai, Yuh Fang; Xie, Yuan; Narayanan, Vijaykrishnan; Irwin, Mary Jane.

Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005. 2005. p. 519-524 1524202 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Tsai YF, Xie Y, Narayanan V, Irwin MJ. Three-dimensional cache design exploration using 3DCacti. In Proceedings - 2005 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2005. 2005. p. 519-524. 1524202. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors). https://doi.org/10.1109/ICCD.2005.108