Abstract
Due to the ever-increasing threat of Reverse Engineering (RE) of Intellectual Property (IP) for malicious gains, camouflaging of logic gates is becoming very important. In this paper, we present experimental demonstration of transistor threshold voltage-defined switch [2] based camouflaged logic gates that can hide six logic functionalities i.e. NAND, AND, NOR, OR, XOR and XNOR. The proposed gates can be used to design the IP, forcing an adversary to perform brute-force guess-and-verify of the underlying functionality-increasing the RE effort. We propose two flavors of camouflaging, one employing only a pass transistor (NMOS-switch) and the other utilizing a full pass transistor (CMOS-switch). The camouflaged gates are used to design Ring-Oscillators (RO) in ST 65nm technology, one for each functionality, on which we have performed temperature, voltage, and process-variation analysis. We observe that CMOS-switch based camouflaged gate offers a higher performance (∼1.5 - 8X better) than NMOS-switch based gate at an added area cost of only 5%. The proposed gates show functionality till 0.65V. We are also able to reclaim lost performance by dynamically changing the switch gate voltage and show that robust operation can be achieved at lower voltage and under temperature fluctuation.
| Original language | English (US) |
|---|---|
| Title of host publication | ISLPED 2018 - Proceedings of the 2018 International Symposium on Low Power Electronics and Design |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Print) | 9781450357043 |
| DOIs | |
| State | Published - Jul 23 2018 |
| Event | 23rd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2018 - Bellevue, United States Duration: Jul 23 2018 → Jul 25 2018 |
Publication series
| Name | Proceedings of the International Symposium on Low Power Electronics and Design |
|---|---|
| ISSN (Print) | 1533-4678 |
Other
| Other | 23rd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2018 |
|---|---|
| Country | United States |
| City | Bellevue |
| Period | 7/23/18 → 7/25/18 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
}
Threshold defined camouflaged gates in 65nm technology for reverse engineering protection. / Iyengar, Anirudh S.; Vontela, Deepak; Reddy, Ithihasa; Ghosh, Swaroop; Motaman, Syedhamidreza; Jang, Jae Won.
ISLPED 2018 - Proceedings of the 2018 International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2018. a6 (Proceedings of the International Symposium on Low Power Electronics and Design).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Threshold defined camouflaged gates in 65nm technology for reverse engineering protection
AU - Iyengar, Anirudh S.
AU - Vontela, Deepak
AU - Reddy, Ithihasa
AU - Ghosh, Swaroop
AU - Motaman, Syedhamidreza
AU - Jang, Jae Won
PY - 2018/7/23
Y1 - 2018/7/23
N2 - Due to the ever-increasing threat of Reverse Engineering (RE) of Intellectual Property (IP) for malicious gains, camouflaging of logic gates is becoming very important. In this paper, we present experimental demonstration of transistor threshold voltage-defined switch [2] based camouflaged logic gates that can hide six logic functionalities i.e. NAND, AND, NOR, OR, XOR and XNOR. The proposed gates can be used to design the IP, forcing an adversary to perform brute-force guess-and-verify of the underlying functionality-increasing the RE effort. We propose two flavors of camouflaging, one employing only a pass transistor (NMOS-switch) and the other utilizing a full pass transistor (CMOS-switch). The camouflaged gates are used to design Ring-Oscillators (RO) in ST 65nm technology, one for each functionality, on which we have performed temperature, voltage, and process-variation analysis. We observe that CMOS-switch based camouflaged gate offers a higher performance (∼1.5 - 8X better) than NMOS-switch based gate at an added area cost of only 5%. The proposed gates show functionality till 0.65V. We are also able to reclaim lost performance by dynamically changing the switch gate voltage and show that robust operation can be achieved at lower voltage and under temperature fluctuation.
AB - Due to the ever-increasing threat of Reverse Engineering (RE) of Intellectual Property (IP) for malicious gains, camouflaging of logic gates is becoming very important. In this paper, we present experimental demonstration of transistor threshold voltage-defined switch [2] based camouflaged logic gates that can hide six logic functionalities i.e. NAND, AND, NOR, OR, XOR and XNOR. The proposed gates can be used to design the IP, forcing an adversary to perform brute-force guess-and-verify of the underlying functionality-increasing the RE effort. We propose two flavors of camouflaging, one employing only a pass transistor (NMOS-switch) and the other utilizing a full pass transistor (CMOS-switch). The camouflaged gates are used to design Ring-Oscillators (RO) in ST 65nm technology, one for each functionality, on which we have performed temperature, voltage, and process-variation analysis. We observe that CMOS-switch based camouflaged gate offers a higher performance (∼1.5 - 8X better) than NMOS-switch based gate at an added area cost of only 5%. The proposed gates show functionality till 0.65V. We are also able to reclaim lost performance by dynamically changing the switch gate voltage and show that robust operation can be achieved at lower voltage and under temperature fluctuation.
UR - http://www.scopus.com/inward/record.url?scp=85051519698&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85051519698&partnerID=8YFLogxK
U2 - 10.1145/3218603.3218641
DO - 10.1145/3218603.3218641
M3 - Conference contribution
AN - SCOPUS:85051519698
SN - 9781450357043
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
BT - ISLPED 2018 - Proceedings of the 2018 International Symposium on Low Power Electronics and Design
PB - Institute of Electrical and Electronics Engineers Inc.
ER -