Silicon on insulator (SOI) substrates will be required to reduce capacitive coupling and other parasitic effects as device scaling continues. ITRS projections point to a future need for SOI buried oxide layers as thin as 10 nm, and Si channel thickness potentially as low as 5 nm for fully-depleted ultra-thin-body devices. For such thin layers, conventional SOI fabrication processes become increasingly difficult. Progress towards fabricating ultra-thin SOI on Si(001) through an all-growth approach is presented. All steps are performed sequentially in situ, with no wet chemical processing. Starting with a Si wafer as large as 8", our approach is to: 1) deposit a thin commensurate epitaxial oxide layer such as Ca1-xSr xTiO3; 2) oxidize to grow an interface SiO2: layer ('floating' the epitaxial oxide) for stress relief and lowering of the dielectric constant; and 3) deposit epitaxial Si or Si1-xGe x to complete the fabrication process. copyright The Electrochemical Society.
|Original language||English (US)|
|Number of pages||12|
|State||Published - Dec 1 2006|
|Event||Physics and Technology of High-k Gate Dielectrics 4 - 210th Electrochemical Society Meeting - Cancun, Mexico|
Duration: Oct 29 2006 → Nov 3 2006
All Science Journal Classification (ASJC) codes