Unifying carry-sum and signed-digit number representations for low power

Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin

Research output: Contribution to conferencePaper

3 Scopus citations

Abstract

Historically, signed-digit adders have been thought of as being logically very complicated to implement, while carry-save adders have been considered to be fast, low power and easy to implement. While the latter is true, the former is a misconception. We show that for every integer k≥1, it is possible to build a network of radix-2k signed-digit adders having the same logical complexity and hence the same area, delay and power consumption as a network of k-bit carry-sum adders (where, a 1-bit carry-sum adder is a carry-save adder). We also study the power and delay tradeoffs involved in using a network of carry-save and signed-digit adders for adding multiple operands when compared to a fast two's-complement adder and show that it always consumes less power. However, when the number of operands is large (>26), a tree of fast carry-lookahead adders was found to be faster.

Original languageEnglish (US)
Pages15-20
Number of pages6
Publication statusPublished - Jan 1 1995
EventProceedings of the 1995 International Symposium on Low Power Design - Dana Point, CA, USA
Duration: Apr 23 1995Apr 26 1995

Conference

ConferenceProceedings of the 1995 International Symposium on Low Power Design
CityDana Point, CA, USA
Period4/23/954/26/95

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All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Nagendra, C., Owens, R. M., & Irwin, M. J. (1995). Unifying carry-sum and signed-digit number representations for low power. 15-20. Paper presented at Proceedings of the 1995 International Symposium on Low Power Design, Dana Point, CA, USA, .