Variation aware placement for FPGAs

Suresh Srinivasan, Vijaykrishnan Narayanan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations
Original languageEnglish (US)
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006
Pages422-423
Number of pages2
Volume2006
DOIs
StatePublished - Oct 9 2006
EventIEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006 - Klarlsruhe, Germany
Duration: Mar 2 2006Mar 3 2006

Other

OtherIEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006
CountryGermany
CityKlarlsruhe
Period3/2/063/3/06

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Srinivasan, S., & Narayanan, V. (2006). Variation aware placement for FPGAs. In Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006 (Vol. 2006, pp. 422-423). [1602477] https://doi.org/10.1109/ISVLSI.2006.92